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gengyl08 edited this page Dec 21, 2012 · 6 revisions

Name

nf10_arp_reply

Version

v1.00a

Author

Yilong Geng (Stanford University)

Type

pcore (HW)

Location

netfpga-10g/lib/hw/contrib/pcores/nf10_arp_reply_v1_00_a/

Interface Types

AXI4-Stream & AXI4-Lite

Busses

S_AXIS: Slave AXI4-Stream bus, Variable width

M_AXIS: Master AXI4-Stream bus, Variable width

Parameters

C_AXIS_DATA_WIDTH: Data width of the AXI4-Stream bus. C_AXIS_TUSER_WIDTH: Data width of the TUSER field. SRC_PORT_POS: The position of the Source_Port field in TUSER. DST_PORT_POS: The position of the Destination_Port field in TUSER.

Register map

Description

This module is a part of the Openflow tunneling switch data path. It makes the tunnel transparent to ARP protocol.

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