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[rv_dm,sival] Fix rv_dm_mem_access_dev_rv_dm_delayed_enable #2630

[rv_dm,sival] Fix rv_dm_mem_access_dev_rv_dm_delayed_enable

[rv_dm,sival] Fix rv_dm_mem_access_dev_rv_dm_delayed_enable #2630

Re-run triggered November 30, 2024 08:36
Status Success
Total duration 29m 3s
Artifacts 39

ci.yml

on: pull_request
Earl Grey for CW310  /  Build bitstream
2m 43s
Earl Grey for CW310 / Build bitstream
Earl Grey for CW310 Hyperdebug  /  Build bitstream
2m 41s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
2m 37s
Earl Grey for CW340 / Build bitstream
Lint (slow)
13m 29s
Lint (slow)
Airgapped build
10m 37s
Airgapped build
Verible lint
57s
Verible lint
Run OTBN smoke Test
2m 41s
Run OTBN smoke Test
Run OTBN crypto tests
2m 36s
Run OTBN crypto tests
Verilated English Breakfast
7m 59s
Verilated English Breakfast
Verilated Earl Grey
1h 8m
Verilated Earl Grey
CW305's Bitstream
21m 49s
CW305's Bitstream
Build Docker Containers
3m 10s
Build Docker Containers
Build and test software
14m 26s
Build and test software
CW310 Test ROM Tests  /  FPGA test
3m 6s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
44m 13s
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
5m 51s
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
26m 40s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
37m 23s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
28m 16s
CW310 Manufacturing Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
6m 23s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
52s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
2m 48s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
18m 43s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
3m 5s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
8m 17s
CW340 Manufacturing Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
22s
Verify FPGA jobs
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2 errors
Build and test software
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
57.6 KB