Fix reading cycle count on non-msvc win-on-aarch64

zeromq · Aug 10, 2024 · c8d9865 · c8d9865
1 parent b95d949
commit c8d9865
Showing 1 changed file with 4 additions and 0 deletions.
diff --git a/src/clock.cpp b/src/clock.cpp
@@ -223,6 +223,10 @@ uint64_t zmq::clock_t::rdtsc ()
                                  ((13 & 15) << 3) | // crm
                                  ((0 & 7) << 0));   // op2
     return _ReadStatusReg (pmccntr_el0);
+#elif (defined(__GNUC__) && defined(__aarch64__))
+    uint64_t val;
+    __asm__ volatile("mrs %0, pmccntr_el0" : "=r"(val));
+    return val;
 #elif (defined __GNUC__ && (defined __i386__ || defined __x86_64__))
     uint32_t low, high;
     __asm__ volatile("rdtsc" : "=a"(low), "=d"(high));