Fix REQUIRE_LOCK and amoswap instruction

virtualsquare · Oct 30, 2024 · 78da304 · 78da304
1 parent 97a62b0
commit 78da304
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Showing 2 changed files with 10 additions and 9 deletions.
diff --git a/src/support/liburiscv/liburiscv.S b/src/support/liburiscv/liburiscv.S
@@ -356,14 +356,14 @@ LEAF_FUNC(INITCPU)
 
 
 LEAF_FUNC(ACQUIRE_LOCK)
-	li a1, 0
-	li a2, 0
+	li t0, 1
+	li t1, 0
 	retry:
-		amoswap.w a1, a1, 0(a0)
-		bne a1, a2, retry # if a1 != 0 then goto retry
+		amoswap.w t0, t0, 0(a0)
+		bne t0, t1, retry # if a1 != 0 then goto retry
 	jr	ra
 
 LEAF_FUNC(RELEASE_LOCK)
-	li a1, 0
-	amoswap.w a1, a1, 0(a0)
+	li t0, 0
+	amoswap.w t0, t0, 0(a0)
 	jr	ra
diff --git a/src/uriscv/processor.cc b/src/uriscv/processor.cc
@@ -941,11 +941,12 @@ bool Processor::execInstrR(Word instr) {
 	case OP_AMOSWAP_AQ_FUNC7:
 	case OP_AMOSWAP_RL_AQ_FUNC7: {
       DISASSMSG("AMOSWAP %d,%d,%s(%x)\n", regRead(rd), regRead(rs2), regName[rs1], regRead(rs1));
-      regWrite(rd, regRead(rs1));
 	  Word datap;
-	  this->bus->DataRead(regRead(rs1), &datap, this);
+      Word reg1 = regRead(rs1);
+      Word reg2 = regRead(rs2);
+	  this->bus->DataRead(reg1, &datap, this);
       regWrite(rd, datap);
-	  this->bus->DataWrite(regRead(rs1), regRead(rs2), this);
+	  this->bus->DataWrite(reg1, reg2, this);
       break;
     }
     default: {