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Include i386-rust-and-jit.inc to remove code duplication
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@antoyo
antoyo committed Oct 11, 2024
1 parent 7bc2188 commit ff58217
Showing 1 changed file with 5 additions and 160 deletions.
165 changes: 5 additions & 160 deletions gcc/config/i386/i386-jit.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -32,16 +32,7 @@ along with GCC; see the file COPYING3. If not see
void
ix86_jit_target_versions (void)
{
if (TARGET_64BIT)
{
jit_add_target_info ("target_arch", "x86_64");

// TODO
/*if (TARGET_X32)
jit_add_target_info ("target_arch", "D_X32");*/
}
else
jit_add_target_info ("target_arch", "x86");
// TODO: remove this hook.
}

/* Implement TARGET_JIT_REGISTER_CPU_TARGET_INFO. */
Expand Down Expand Up @@ -79,157 +70,11 @@ ix86_jit_register_target_info (void)

if (float64_type_node != NULL && TYPE_PRECISION(float64_type_node) == 64)
jit_target_add_supported_target_dependent_type(GCC_JIT_TYPE_FLOAT64);

if (float128_type_node != NULL && TYPE_PRECISION(float128_type_node) == 128)
jit_target_add_supported_target_dependent_type(GCC_JIT_TYPE_FLOAT128);

if (TARGET_MMX)
jit_add_target_info ("target_feature", "mmx");
if (TARGET_SSE)
jit_add_target_info("target_feature", "sse");
if (TARGET_SSE2)
jit_add_target_info("target_feature", "sse2");
if (TARGET_SSE3)
jit_add_target_info("target_feature", "sse3");
if (TARGET_SSSE3)
jit_add_target_info("target_feature", "ssse3");
if (TARGET_SSE4_1)
jit_add_target_info("target_feature", "sse4.1");
if (TARGET_SSE4_2)
jit_add_target_info("target_feature", "sse4.2");
if (TARGET_AES)
jit_add_target_info("target_feature", "aes");
if (TARGET_SHA)
jit_add_target_info("target_feature", "sha");
if (TARGET_AVX)
jit_add_target_info("target_feature", "avx");
if (TARGET_AVX2)
jit_add_target_info("target_feature", "avx2");
if (TARGET_AVX512F)
jit_add_target_info("target_feature", "avx512f");
// TODO: update the name:
/*if (TARGET_AVX512ER)
jit_add_target_info("target_feature", "avx512er");*/
if (TARGET_AVX512CD)
jit_add_target_info("target_feature", "avx512cd");
// TODO: update the name:
/*if (TARGET_AVX512PF)
jit_add_target_info("target_feature", "avx512pf");*/
if (TARGET_AVX512DQ)
jit_add_target_info("target_feature", "avx512dq");
if (TARGET_AVX512BW)
jit_add_target_info("target_feature", "avx512bw");
if (TARGET_AVX512VL)
jit_add_target_info("target_feature", "avx512vl");
if (TARGET_AVX512VBMI)
jit_add_target_info("target_feature", "avx512vbmi");
if (TARGET_AVX512IFMA)
jit_add_target_info("target_feature", "avx512ifma");
if (TARGET_AVX512VPOPCNTDQ)
jit_add_target_info("target_feature", "avx512vpopcntdq");
if (TARGET_FMA)
jit_add_target_info("target_feature", "fma");
if (TARGET_RTM)
jit_add_target_info("target_feature", "rtm");
if (TARGET_SSE4A)
jit_add_target_info("target_feature", "sse4a");
if (TARGET_BMI) {
jit_add_target_info("target_feature", "bmi1");
jit_add_target_info("target_feature", "bmi");
}
if (TARGET_BMI2)
jit_add_target_info("target_feature", "bmi2");
if (TARGET_LZCNT)
jit_add_target_info("target_feature", "lzcnt");
if (TARGET_TBM)
jit_add_target_info("target_feature", "tbm");
if (TARGET_POPCNT)
jit_add_target_info("target_feature", "popcnt");
if (TARGET_RDRND) {
jit_add_target_info("target_feature", "rdrand");
jit_add_target_info("target_feature", "rdrnd");
}
if (TARGET_F16C)
jit_add_target_info("target_feature", "f16c");
if (TARGET_RDSEED)
jit_add_target_info("target_feature", "rdseed");
if (TARGET_ADX)
jit_add_target_info("target_feature", "adx");
if (TARGET_FXSR)
jit_add_target_info("target_feature", "fxsr");
if (TARGET_XSAVE)
jit_add_target_info("target_feature", "xsave");
if (TARGET_XSAVEOPT)
jit_add_target_info("target_feature", "xsaveopt");
if (TARGET_XSAVEC)
jit_add_target_info("target_feature", "xsavec");
if (TARGET_XSAVES)
jit_add_target_info("target_feature", "xsaves");
if (TARGET_VPCLMULQDQ) {
jit_add_target_info("target_feature", "pclmulqdq");
jit_add_target_info("target_feature", "vpclmulqdq");
}
if (TARGET_CMPXCHG16B)
jit_add_target_info("target_feature", "cmpxchg16b");
if (TARGET_MOVBE)
jit_add_target_info("target_feature", "movbe");
if (TARGET_AVX512VBMI2)
jit_add_target_info("target_feature", "avx512vbmi2");
if (TARGET_PKU)
jit_add_target_info("target_feature", "pku");
if (TARGET_AVX512VNNI)
jit_add_target_info("target_feature", "avx512vnni");
if (TARGET_AVX512BF16)
jit_add_target_info("target_feature", "avx512bf16");
if (TARGET_AVX512BITALG)
jit_add_target_info("target_feature", "avx512bitalg");
if (TARGET_AVX512VP2INTERSECT)
jit_add_target_info("target_feature", "avx512vp2intersect");
if (TARGET_PCLMUL)
jit_add_target_info("target_feature", "pclmul");
if (TARGET_GFNI)
jit_add_target_info("target_feature", "gfni");
if (TARGET_FMA4)
jit_add_target_info("target_feature", "fma4");
if (TARGET_XOP)
jit_add_target_info("target_feature", "xop");
if (TARGET_AVXIFMA)
jit_add_target_info("target_feature", "avxifma");
if (TARGET_AVXNECONVERT)
jit_add_target_info("target_feature", "avxneconvert");
if (TARGET_AVXVNNIINT8)
jit_add_target_info("target_feature", "avxvnniint8");
if (TARGET_AVXVNNIINT16)
jit_add_target_info("target_feature", "avxvnniint16");

// this is only enabled by choice in llvm, never by default - TODO determine if gcc enables it
// jit_add_target_info("target_feature", "sse-unaligned-mem");

if (TARGET_VAES)
jit_add_target_info("target_feature", "vaes");
if (TARGET_LWP)
jit_add_target_info("target_feature", "lwp");
if (TARGET_FSGSBASE)
jit_add_target_info("target_feature", "fsgsbase");
if (TARGET_SHSTK)
jit_add_target_info("target_feature", "shstk");
if (TARGET_PRFCHW)
jit_add_target_info("target_feature", "prfchw");
if (TARGET_SAHF) // would this be better as TARGET_USE_SAHF?
jit_add_target_info("target_feature", "sahf");
if (TARGET_MWAITX)
jit_add_target_info("target_feature", "mwaitx");
if (TARGET_CLZERO)
jit_add_target_info("target_feature", "clzero");
if (TARGET_CLDEMOTE)
jit_add_target_info("target_feature", "cldemote");
if (TARGET_PTWRITE)
jit_add_target_info("target_feature", "ptwrite");
bool hasERMSB = ix86_arch == PROCESSOR_HASWELL || ix86_arch == PROCESSOR_SKYLAKE
|| ix86_arch == PROCESSOR_SKYLAKE_AVX512 || ix86_arch == PROCESSOR_CANNONLAKE
|| ix86_arch == PROCESSOR_ICELAKE_CLIENT || ix86_arch == PROCESSOR_ICELAKE_SERVER
|| ix86_arch == PROCESSOR_CASCADELAKE || ix86_arch == PROCESSOR_TIGERLAKE
|| ix86_arch == PROCESSOR_COOPERLAKE;
if (hasERMSB)
jit_add_target_info("target_feature", "ermsbd");
#define ADD_TARGET_INFO jit_add_target_info
#include "i386-rust-and-jit.inc"
#undef ADD_TARGET_INFO
}

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