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[topgen] Only create pwrmgr if there is an instance
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Signed-off-by: Robert Schilling <[email protected]>
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Razer6 committed Nov 27, 2024
1 parent 53705b7 commit 4c6fde5
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Showing 6 changed files with 50 additions and 31 deletions.
2 changes: 1 addition & 1 deletion hw/top_earlgrey/templates/toplevel.sv.tpl
Original file line number Diff line number Diff line change
Expand Up @@ -359,7 +359,7 @@ module top_${top["name"]} #(

## Not all top levels have a lifecycle controller.
## For those that do not, always enable ibex.
% if not lib.is_lc_ctrl(top["module"]):
% if not lib.find_module(top["module"], 'lc_ctrl'):
assign rv_core_ibex_lc_cpu_en = lc_ctrl_pkg::On;
% endif

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5 changes: 3 additions & 2 deletions util/topgen.py
Original file line number Diff line number Diff line change
Expand Up @@ -806,8 +806,9 @@ def _process_top(
# Generate Pinmux
generate_pinmux(completecfg, out_path)

# Generate Pwrmgr
generate_pwrmgr(completecfg, out_path)
# Generate Pwrmgr only if there is an instance
if lib.find_module(completecfg['module'], 'pwrmgr'):
generate_pwrmgr(completecfg, out_path)

# Generate rstmgr
generate_rstmgr(completecfg, out_path)
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16 changes: 9 additions & 7 deletions util/topgen/lib.py
Original file line number Diff line number Diff line change
Expand Up @@ -819,14 +819,14 @@ def num_rom_ctrl(modules):
return num


def is_lc_ctrl(modules):
'''Return true if lc_ctrl exists in the design
def find_module(modules, type):
'''Returns the first module of a given type
'''
for m in modules:
if m['type'] == 'lc_ctrl':
return True
if m['type'] == type:
return m

return False
return None


def get_addr_space(top, addr_space_name):
Expand Down Expand Up @@ -866,9 +866,11 @@ def __init__(self, top_info, name_to_block: Dict[str, IpBlock], enum_type, array
self._init_alert_mapping()
self._init_pinmux_mapping()
self._init_pad_mapping()
self._init_pwrmgr_wakeups()
# Only generate pwrmgr mappings if there is a pwrmgr
if find_module(self.top['module'], 'pwrmgr'):
self._init_pwrmgr_wakeups()
self._init_pwrmgr_reset_requests()
self._init_rstmgr_sw_rsts()
self._init_pwrmgr_reset_requests()
self._init_clkmgr_clocks()
self._init_subranges()

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40 changes: 19 additions & 21 deletions util/topgen/merge.py
Original file line number Diff line number Diff line change
Expand Up @@ -1014,9 +1014,6 @@ def amend_alert(top: OrderedDict, name_to_block: Dict[str, IpBlock]):


def amend_wkup(topcfg: OrderedDict, name_to_block: Dict[str, IpBlock]):

pwrmgr_name = _find_module_name(topcfg['module'], 'pwrmgr')

if "wakeups" not in topcfg or topcfg["wakeups"] == "":
topcfg["wakeups"] = []

Expand All @@ -1032,22 +1029,21 @@ def amend_wkup(topcfg: OrderedDict, name_to_block: Dict[str, IpBlock]):
'module': m["name"]
})

# add wakeup signals to pwrmgr connections
signal_names = [
f"{s['module'].lower()}.{s['name'].lower()}" for s in topcfg["wakeups"]
]
pwrmgr_name = _find_module_name(topcfg['module'], 'pwrmgr')
if pwrmgr_name:
# add wakeup signals to pwrmgr connections if there is one
signal_names = [
f"{s['module'].lower()}.{s['name'].lower()}" for s in topcfg["wakeups"]
]

topcfg["inter_module"]["connect"]["{}.wakeups".format(pwrmgr_name)] = signal_names
log.info("Intermodule signals: {}".format(
topcfg["inter_module"]["connect"]))
topcfg["inter_module"]["connect"]["{}.wakeups".format(pwrmgr_name)] = signal_names
log.info("Intermodule signals: {}".format(
topcfg["inter_module"]["connect"]))


# Handle reset requests from modules
def amend_reset_request(topcfg: OrderedDict,
name_to_block: Dict[str, IpBlock]):

pwrmgr_name = _find_module_name(topcfg['module'], 'pwrmgr')

if "reset_requests" not in topcfg or topcfg["reset_requests"] == "":
topcfg["reset_requests"] = {}
topcfg["reset_requests"]["peripheral"] = []
Expand Down Expand Up @@ -1088,15 +1084,17 @@ def amend_reset_request(topcfg: OrderedDict,
'desc': signal.desc
})

# add reset requests to pwrmgr connections
signal_names = [
"{}.{}".format(s["module"].lower(), s["name"].lower())
for s in topcfg["reset_requests"]["peripheral"]
]
pwrmgr_name = _find_module_name(topcfg['module'], 'pwrmgr')
if pwrmgr_name:
# add reset requests to pwrmgr connections if there is one
signal_names = [
"{}.{}".format(s["module"].lower(), s["name"].lower())
for s in topcfg["reset_requests"]["peripheral"]
]

topcfg["inter_module"]["connect"]["{}.rstreqs".format(pwrmgr_name)] = signal_names
log.info("Intermodule signals: {}".format(
topcfg["inter_module"]["connect"]))
topcfg["inter_module"]["connect"]["{}.rstreqs".format(pwrmgr_name)] = signal_names
log.info("Intermodule signals: {}".format(
topcfg["inter_module"]["connect"]))


def append_io_signal(temp: Dict, sig_inst: Dict) -> None:
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9 changes: 9 additions & 0 deletions util/topgen/templates/toplevel.h.tpl
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,9 @@
// SPDX-License-Identifier: Apache-2.0
<%
import textwrap
import topgen.lib as lib

has_pwr_mgr = lib.find_module(top['module'], 'pwrmgr')
%>\

#ifndef ${helper.header_macro_prefix}_TOP_${top["name"].upper()}_H_
Expand All @@ -21,7 +24,9 @@ import textwrap
* - PLIC Interrupt ID Names and Source Mappings
* - Alert ID Names and Source Mappings
* - Pinmux Pin/Select Names
% if has_pwr_mgr:
* - Power Manager Wakeups
% endif
*/

#ifdef __cplusplus
Expand Down Expand Up @@ -175,21 +180,25 @@ ${helper.direct_pads.render()}
* Muxed Pad Selects
*/
${helper.muxed_pads.render()}
% if has_pwr_mgr:

/**
* Power Manager Wakeup Signals
*/
${helper.pwrmgr_wakeups.render()}
% endif

/**
* Reset Manager Software Controlled Resets
*/
${helper.rstmgr_sw_rsts.render()}
% if has_pwr_mgr:

/**
* Power Manager Reset Request Signals
*/
${helper.pwrmgr_reset_requests.render()}
% endif

/**
* Clock Manager Software-Controlled ("Gated") Clocks.
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9 changes: 9 additions & 0 deletions util/topgen/templates/toplevel.rs.tpl
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,9 @@
// SPDX-License-Identifier: Apache-2.0
<%
import textwrap
import topgen.lib as lib

has_pwr_mgr = lib.find_module(top['module'], 'pwrmgr')
%>\
${helper.file_header.render()}
// This file was generated automatically.
Expand All @@ -20,7 +23,9 @@ ${helper.file_header.render()}
//! - PLIC Interrupt ID Names and Source Mappings
//! - Alert ID Names and Source Mappings
//! - Pinmux Pin/Select Names
% if has_pwr_mgr:
//! - Power Manager Wakeups
% endif

use core::convert::TryFrom;

Expand Down Expand Up @@ -134,15 +139,19 @@ ${helper.direct_pads.render(gen_cast=True)}

/// Muxed Pad Selects
${helper.muxed_pads.render(gen_cast=True)}
% if has_pwr_mgr:

/// Power Manager Wakeup Signals
${helper.pwrmgr_wakeups.render()}
% endif

/// Reset Manager Software Controlled Resets
${helper.rstmgr_sw_rsts.render()}
% if has_pwr_mgr:

/// Power Manager Reset Request Signals
${helper.pwrmgr_reset_requests.render()}
% endif

/// Clock Manager Software-Controlled ("Gated") Clocks.
///
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