forked from 173210/snes9xTYL
-
Notifications
You must be signed in to change notification settings - Fork 16
/
cpumacro.h
870 lines (750 loc) · 18.3 KB
/
cpumacro.h
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
/*******************************************************************************
Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
(c) Copyright 1996 - 2002 Gary Henderson ([email protected]) and
Jerremy Koot ([email protected])
(c) Copyright 2001 - 2004 John Weidman ([email protected])
(c) Copyright 2002 - 2004 Brad Jorsch ([email protected]),
funkyass ([email protected]),
Joel Yliluoma (http://iki.fi/bisqwit/)
Kris Bleakley ([email protected]),
Matthew Kendora,
Nach ([email protected]),
Peter Bortas ([email protected]) and
zones ([email protected])
C4 x86 assembler and some C emulation code
(c) Copyright 2000 - 2003 zsKnight ([email protected]),
_Demo_ ([email protected]), and Nach
C4 C++ code
(c) Copyright 2003 Brad Jorsch
DSP-1 emulator code
(c) Copyright 1998 - 2004 Ivar ([email protected]), _Demo_, Gary Henderson,
John Weidman, neviksti ([email protected]),
Kris Bleakley, Andreas Naive
DSP-2 emulator code
(c) Copyright 2003 Kris Bleakley, John Weidman, neviksti, Matthew Kendora, and
Lord Nightmare ([email protected]
OBC1 emulator code
(c) Copyright 2001 - 2004 zsKnight, pagefault ([email protected]) and
Kris Bleakley
Ported from x86 assembler to C by sanmaiwashi
SPC7110 and RTC C++ emulator code
(c) Copyright 2002 Matthew Kendora with research by
zsKnight, John Weidman, and Dark Force
S-DD1 C emulator code
(c) Copyright 2003 Brad Jorsch with research by
Andreas Naive and John Weidman
S-RTC C emulator code
(c) Copyright 2001 John Weidman
ST010 C++ emulator code
(c) Copyright 2003 Feather, Kris Bleakley, John Weidman and Matthew Kendora
Super FX x86 assembler emulator code
(c) Copyright 1998 - 2003 zsKnight, _Demo_, and pagefault
Super FX C emulator code
(c) Copyright 1997 - 1999 Ivar, Gary Henderson and John Weidman
SH assembler code partly based on x86 assembler code
(c) Copyright 2002 - 2004 Marcus Comstedt ([email protected])
Specific ports contains the works of other authors. See headers in
individual files.
Snes9x homepage: http://www.snes9x.com
Permission to use, copy, modify and distribute Snes9x in both binary and
source form, for non-commercial purposes, is hereby granted without fee,
providing that this license information and copyright notice appear with
all copies and any derived work.
This software is provided 'as-is', without any express or implied
warranty. In no event shall the authors be held liable for any damages
arising from the use of this software.
Snes9x is freeware for PERSONAL USE only. Commercial users should
seek permission of the copyright holders first. Commercial use includes
charging money for Snes9x or software derived from Snes9x.
The copyright holders request that bug fixes and improvements to the code
should be forwarded to them so everyone can benefit from the modifications
in future versions.
Super NES and Super Nintendo Entertainment System are trademarks of
Nintendo Co., Limited and its subsidiary companies.
*******************************************************************************/
#ifndef _CPUMACRO_H_
#define _CPUMACRO_H_
STATIC inline void SetZN16 (uint16 Work)
{
ICPU._Zero = Work != 0;
ICPU._Negative = (uint8) (Work >> 8);
}
STATIC inline void SetZN8 (uint8 Work)
{
ICPU._Zero = Work;
ICPU._Negative = Work;
}
STATIC inline void ADC8 (long OpAddress)
{
uint8 Work8 = S9xGetByte (OpAddress);
if (CheckDecimal ())
{
uint8 A1 = (Registers.A.W) & 0xF;
uint8 A2 = (Registers.A.W >> 4) & 0xF;
uint8 W1 = Work8 & 0xF;
uint8 W2 = (Work8 >> 4) & 0xF;
A1 += W1 + CheckCarry();
if (A1 > 9)
{
A1 -= 10;
A2++;
}
A2 += W2;
if (A2 > 9)
{
A2 -= 10;
SetCarry ();
}
else
{
ClearCarry ();
}
uint8 Ans8 = (A2 << 4) | A1;
if (~(Registers.AL ^ Work8) &
(Work8 ^ Ans8) & 0x80)
SetOverflow();
else
ClearOverflow();
Registers.AL = Ans8;
SetZN8 (Registers.AL);
}
else
{
uint16 Ans16 = Registers.AL + Work8 + CheckCarry();
ICPU._Carry = Ans16 >= 0x100;
if (~(Registers.AL ^ Work8) &
(Work8 ^ (uint8) Ans16) & 0x80)
SetOverflow();
else
ClearOverflow();
Registers.AL = (uint8) Ans16;
SetZN8 (Registers.AL);
}
}
STATIC inline void ADC16 (long OpAddress)
{
uint16 Work16 = S9xGetWord (OpAddress);
if (CheckDecimal ())
{
uint8 A1 = (Registers.A.W) & 0xF;
uint8 A2 = (Registers.A.W >> 4) & 0xF;
uint8 A3 = (Registers.A.W >> 8) & 0xF;
uint8 A4 = (Registers.A.W >> 12) & 0xF;
uint8 W1 = Work16 & 0xF;
uint8 W2 = (Work16 >> 4) & 0xF;
uint8 W3 = (Work16 >> 8) & 0xF;
uint8 W4 = (Work16 >> 12) & 0xF;
A1 += W1 + CheckCarry ();
if (A1 > 9)
{
A1 -= 10;
A2++;
}
A2 += W2;
if (A2 > 9)
{
A2 -= 10;
A3++;
}
A3 += W3;
if (A3 > 9)
{
A3 -= 10;
A4++;
}
A4 += W4;
if (A4 > 9)
{
A4 -= 10;
SetCarry ();
}
else
{
ClearCarry ();
}
uint16 Ans16 = (A4 << 12) | (A3 << 8) | (A2 << 4) | (A1);
if (~(Registers.A.W ^ Work16) &
(Work16 ^ Ans16) & 0x8000)
SetOverflow();
else
ClearOverflow();
Registers.A.W = Ans16;
SetZN16 (Registers.A.W);
}
else
{
uint32 Ans32 = Registers.A.W + Work16 + CheckCarry();
ICPU._Carry = Ans32 >= 0x10000;
if (~(Registers.A.W ^ Work16) &
(Work16 ^ (uint16) Ans32) & 0x8000)
SetOverflow();
else
ClearOverflow();
Registers.A.W = (uint16) Ans32;
SetZN16 (Registers.A.W);
}
}
STATIC inline void AND16 (long OpAddress)
{
Registers.A.W &= S9xGetWord (OpAddress);
SetZN16 (Registers.A.W);
}
STATIC inline void AND8 (long OpAddress)
{
Registers.AL &= S9xGetByte (OpAddress);
SetZN8 (Registers.AL);
}
STATIC inline void A_ASL16 ()
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
ICPU._Carry = (Registers.AH & 0x80) != 0;
Registers.A.W <<= 1;
SetZN16 (Registers.A.W);
}
STATIC inline void A_ASL8 ()
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
ICPU._Carry = (Registers.AL & 0x80) != 0;
Registers.AL <<= 1;
SetZN8 (Registers.AL);
}
STATIC inline void ASL16 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint16 Work16 = S9xGetWord (OpAddress);
ICPU._Carry = (Work16 & 0x8000) != 0;
Work16 <<= 1;
S9xSetWord (Work16, OpAddress);
SetZN16 (Work16);
}
STATIC inline void ASL8 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint8 Work8 = S9xGetByte (OpAddress);
ICPU._Carry = (Work8 & 0x80) != 0;
Work8 <<= 1;
S9xSetByte (Work8, OpAddress);
SetZN8 (Work8);
}
STATIC inline void BIT16 (long OpAddress)
{
uint16 Work16 = S9xGetWord (OpAddress);
ICPU._Overflow = (Work16 & 0x4000) != 0;
ICPU._Negative = (uint8) (Work16 >> 8);
ICPU._Zero = (Work16 & Registers.A.W) != 0;
}
STATIC inline void BIT8 (long OpAddress)
{
uint8 Work8 = S9xGetByte (OpAddress);
ICPU._Overflow = (Work8 & 0x40) != 0;
ICPU._Negative = Work8;
ICPU._Zero = Work8 & Registers.AL;
}
STATIC inline void CMP16 (long OpAddress)
{
long s9xInt32 = (long) Registers.A.W -
(long) S9xGetWord (OpAddress);
ICPU._Carry = s9xInt32 >= 0;
SetZN16 ((uint16) s9xInt32);
}
STATIC inline void CMP8 (long OpAddress)
{
short s9xInt16 = (short) Registers.AL -
(short) S9xGetByte (OpAddress);
ICPU._Carry = s9xInt16 >= 0;
SetZN8 ((uint8) s9xInt16);
}
STATIC inline void CMX16 (long OpAddress)
{
long s9xInt32 = (long) Registers.X.W -
(long) S9xGetWord (OpAddress);
ICPU._Carry = s9xInt32 >= 0;
SetZN16 ((uint16) s9xInt32);
}
STATIC inline void CMX8 (long OpAddress)
{
short s9xInt16 = (short) Registers.XL -
(short) S9xGetByte (OpAddress);
ICPU._Carry = s9xInt16 >= 0;
SetZN8 ((uint8) s9xInt16);
}
STATIC inline void CMY16 (long OpAddress)
{
long s9xInt32 = (long) Registers.Y.W -
(long) S9xGetWord (OpAddress);
ICPU._Carry = s9xInt32 >= 0;
SetZN16 ((uint16) s9xInt32);
}
STATIC inline void CMY8 (long OpAddress)
{
short s9xInt16 = (short) Registers.YL -
(short) S9xGetByte (OpAddress);
ICPU._Carry = s9xInt16 >= 0;
SetZN8 ((uint8) s9xInt16);
}
STATIC inline void A_DEC16 ()
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
CPU.WaitAddress = NULL;
#endif
Registers.A.W--;
SetZN16 (Registers.A.W);
}
STATIC inline void A_DEC8 ()
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
CPU.WaitAddress = NULL;
#endif
Registers.AL--;
SetZN8 (Registers.AL);
}
STATIC inline void DEC16 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
CPU.WaitAddress = NULL;
#endif
uint16 Work16 = S9xGetWord (OpAddress) - 1;
S9xSetWord (Work16, OpAddress);
SetZN16 (Work16);
}
STATIC inline void DEC8 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
CPU.WaitAddress = NULL;
#endif
uint8 Work8 = S9xGetByte (OpAddress) - 1;
S9xSetByte (Work8, OpAddress);
SetZN8 (Work8);
}
STATIC inline void EOR16 (long OpAddress)
{
Registers.A.W ^= S9xGetWord (OpAddress);
SetZN16 (Registers.A.W);
}
STATIC inline void EOR8 (long OpAddress)
{
Registers.AL ^= S9xGetByte (OpAddress);
SetZN8 (Registers.AL);
}
STATIC inline void A_INC16 ()
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
CPU.WaitAddress = NULL;
#endif
Registers.A.W++;
SetZN16 (Registers.A.W);
}
STATIC inline void A_INC8 ()
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
CPU.WaitAddress = NULL;
#endif
Registers.AL++;
SetZN8 (Registers.AL);
}
STATIC inline void INC16 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
CPU.WaitAddress = NULL;
#endif
uint16 Work16 = S9xGetWord (OpAddress) + 1;
S9xSetWord (Work16, OpAddress);
SetZN16 (Work16);
}
STATIC inline void INC8 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
CPU.WaitAddress = NULL;
#endif
uint8 Work8 = S9xGetByte (OpAddress) + 1;
S9xSetByte (Work8, OpAddress);
SetZN8 (Work8);
}
STATIC inline void LDA16 (long OpAddress)
{
Registers.A.W = S9xGetWord (OpAddress);
SetZN16 (Registers.A.W);
}
STATIC inline void LDA8 (long OpAddress)
{
Registers.AL = S9xGetByte (OpAddress);
SetZN8 (Registers.AL);
}
STATIC inline void LDX16 (long OpAddress)
{
Registers.X.W = S9xGetWord (OpAddress);
SetZN16 (Registers.X.W);
}
STATIC inline void LDX8 (long OpAddress)
{
Registers.XL = S9xGetByte (OpAddress);
SetZN8 (Registers.XL);
}
STATIC inline void LDY16 (long OpAddress)
{
Registers.Y.W = S9xGetWord (OpAddress);
SetZN16 (Registers.Y.W);
}
STATIC inline void LDY8 (long OpAddress)
{
Registers.YL = S9xGetByte (OpAddress);
SetZN8 (Registers.YL);
}
STATIC inline void A_LSR16 ()
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
ICPU._Carry = Registers.AL & 1;
Registers.A.W >>= 1;
SetZN16 (Registers.A.W);
}
STATIC inline void A_LSR8 ()
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
ICPU._Carry = Registers.AL & 1;
Registers.AL >>= 1;
SetZN8 (Registers.AL);
}
STATIC inline void LSR16 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint16 Work16 = S9xGetWord (OpAddress);
ICPU._Carry = Work16 & 1;
Work16 >>= 1;
S9xSetWord (Work16, OpAddress);
SetZN16 (Work16);
}
STATIC inline void LSR8 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint8 Work8 = S9xGetByte (OpAddress);
ICPU._Carry = Work8 & 1;
Work8 >>= 1;
S9xSetByte (Work8, OpAddress);
SetZN8 (Work8);
}
STATIC inline void ORA16 (long OpAddress)
{
Registers.A.W |= S9xGetWord (OpAddress);
SetZN16 (Registers.A.W);
}
STATIC inline void ORA8 (long OpAddress)
{
Registers.AL |= S9xGetByte (OpAddress);
SetZN8 (Registers.AL);
}
STATIC inline void A_ROL16 ()
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint32 Work32 = (Registers.A.W << 1) | CheckCarry();
ICPU._Carry = Work32 >= 0x10000;
Registers.A.W = (uint16) Work32;
SetZN16 ((uint16) Work32);
}
STATIC inline void A_ROL8 ()
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint16 Work16 = Registers.AL;
Work16 <<= 1;
Work16 |= CheckCarry();
ICPU._Carry = Work16 >= 0x100;
Registers.AL = (uint8) Work16;
SetZN8 ((uint8) Work16);
}
STATIC inline void ROL16 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint32 Work32 = S9xGetWord (OpAddress);
Work32 <<= 1;
Work32 |= CheckCarry();
ICPU._Carry = Work32 >= 0x10000;
S9xSetWord ((uint16) Work32, OpAddress);
SetZN16 ((uint16) Work32);
}
STATIC inline void ROL8 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint16 Work16 = S9xGetByte (OpAddress);
Work16 <<= 1;
Work16 |= CheckCarry ();
ICPU._Carry = Work16 >= 0x100;
S9xSetByte ((uint8) Work16, OpAddress);
SetZN8 ((uint8) Work16);
}
STATIC inline void A_ROR16 ()
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint32 Work32 = Registers.A.W;
Work32 |= (int) CheckCarry() << 16;
ICPU._Carry = (uint8) (Work32 & 1);
Work32 >>= 1;
Registers.A.W = (uint16) Work32;
SetZN16 ((uint16) Work32);
}
STATIC inline void A_ROR8 ()
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint16 Work16 = Registers.AL | ((uint16) CheckCarry() << 8);
ICPU._Carry = (uint8) Work16 & 1;
Work16 >>= 1;
Registers.AL = (uint8) Work16;
SetZN8 ((uint8) Work16);
}
STATIC inline void ROR16 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint32 Work32 = S9xGetWord (OpAddress);
Work32 |= (int) CheckCarry() << 16;
ICPU._Carry = (uint8) (Work32 & 1);
Work32 >>= 1;
S9xSetWord ((uint16) Work32, OpAddress);
SetZN16 ((uint16) Work32);
}
STATIC inline void ROR8 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint16 Work16 = S9xGetByte (OpAddress);
Work16 |= (int) CheckCarry () << 8;
ICPU._Carry = (uint8) (Work16 & 1);
Work16 >>= 1;
S9xSetByte ((uint8) Work16, OpAddress);
SetZN8 ((uint8) Work16);
}
STATIC inline void SBC16 (long OpAddress)
{
uint16 Work16 = S9xGetWord (OpAddress);
if (CheckDecimal ())
{
uint8 A1 = (Registers.A.W) & 0xF;
uint8 A2 = (Registers.A.W >> 4) & 0xF;
uint8 A3 = (Registers.A.W >> 8) & 0xF;
uint8 A4 = (Registers.A.W >> 12) & 0xF;
uint8 W1 = Work16 & 0xF;
uint8 W2 = (Work16 >> 4) & 0xF;
uint8 W3 = (Work16 >> 8) & 0xF;
uint8 W4 = (Work16 >> 12) & 0xF;
A1 -= W1 + !CheckCarry ();
A2 -= W2;
A3 -= W3;
A4 -= W4;
if (A1 > 9)
{
A1 += 10;
A2--;
}
if (A2 > 9)
{
A2 += 10;
A3--;
}
if (A3 > 9)
{
A3 += 10;
A4--;
}
if (A4 > 9)
{
A4 += 10;
ClearCarry ();
}
else
{
SetCarry ();
}
uint16 Ans16 = (A4 << 12) | (A3 << 8) | (A2 << 4) | (A1);
if ((Registers.A.W ^ Work16) &
(Registers.A.W ^ Ans16) & 0x8000)
SetOverflow();
else
ClearOverflow();
Registers.A.W = Ans16;
SetZN16 (Registers.A.W);
}
else
{
long s9xInt32 = (long) Registers.A.W - (long) Work16 + (long) CheckCarry() - 1;
ICPU._Carry = s9xInt32 >= 0;
if ((Registers.A.W ^ Work16) &
(Registers.A.W ^ (uint16) s9xInt32) & 0x8000)
SetOverflow();
else
ClearOverflow ();
Registers.A.W = (uint16) s9xInt32;
SetZN16 (Registers.A.W);
}
}
STATIC inline void SBC8 (long OpAddress)
{
uint8 Work8 = S9xGetByte (OpAddress);
if (CheckDecimal ())
{
uint8 A1 = (Registers.A.W) & 0xF;
uint8 A2 = (Registers.A.W >> 4) & 0xF;
uint8 W1 = Work8 & 0xF;
uint8 W2 = (Work8 >> 4) & 0xF;
A1 -= W1 + !CheckCarry ();
A2 -= W2;
if (A1 > 9)
{
A1 += 10;
A2--;
}
if (A2 > 9)
{
A2 += 10;
ClearCarry ();
}
else
{
SetCarry ();
}
uint8 Ans8 = (A2 << 4) | A1;
if ((Registers.AL ^ Work8) &
(Registers.AL ^ Ans8) & 0x80)
SetOverflow ();
else
ClearOverflow ();
Registers.AL = Ans8;
SetZN8 (Registers.AL);
}
else
{
short s9xInt16 = (short) Registers.AL - (short) Work8 + (short) CheckCarry() - 1;
ICPU._Carry = s9xInt16 >= 0;
if ((Registers.AL ^ Work8) &
(Registers.AL ^ (uint8) s9xInt16) & 0x80)
SetOverflow ();
else
ClearOverflow ();
Registers.AL = (uint8) s9xInt16;
SetZN8 (Registers.AL);
}
}
STATIC inline void STA16 (long OpAddress)
{
S9xSetWord (Registers.A.W, OpAddress);
}
STATIC inline void STA8 (long OpAddress)
{
S9xSetByte (Registers.AL, OpAddress);
}
STATIC inline void STX16 (long OpAddress)
{
S9xSetWord (Registers.X.W, OpAddress);
}
STATIC inline void STX8 (long OpAddress)
{
S9xSetByte (Registers.XL, OpAddress);
}
STATIC inline void STY16 (long OpAddress)
{
S9xSetWord (Registers.Y.W, OpAddress);
}
STATIC inline void STY8 (long OpAddress)
{
S9xSetByte (Registers.YL, OpAddress);
}
STATIC inline void STZ16 (long OpAddress)
{
S9xSetWord (0, OpAddress);
}
STATIC inline void STZ8 (long OpAddress)
{
S9xSetByte (0, OpAddress);
}
STATIC inline void TSB16 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint16 Work16 = S9xGetWord (OpAddress);
ICPU._Zero = (Work16 & Registers.A.W) != 0;
Work16 |= Registers.A.W;
S9xSetWord (Work16, OpAddress);
}
STATIC inline void TSB8 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint8 Work8 = S9xGetByte (OpAddress);
ICPU._Zero = Work8 & Registers.AL;
Work8 |= Registers.AL;
S9xSetByte (Work8, OpAddress);
}
STATIC inline void TRB16 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint16 Work16 = S9xGetWord (OpAddress);
ICPU._Zero = (Work16 & Registers.A.W) != 0;
Work16 &= ~Registers.A.W;
S9xSetWord (Work16, OpAddress);
}
STATIC inline void TRB8 (long OpAddress)
{
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#endif
uint8 Work8 = S9xGetByte (OpAddress);
ICPU._Zero = Work8 & Registers.AL;
Work8 &= ~Registers.AL;
S9xSetByte (Work8, OpAddress);
}
#endif