stm32/timer: avoid max_compare_value >= u16::MAX

[aurelj]

With STM32 32 bits timers, the max_compare_value (AKA, ARR register) can currently be set greater than u16::MAX, which leads to the following assert!(max < u16::MAX as u32) in max_duty_cycle() when setting up a 1 kHz SimplePwm on 84 MHz MCU.

The issue is fixed by computing an appropriate prescaler value so that max_compare_value fits into 16 bits.

Note that with current code, the prescaler computation is pretty useless as it always returns 0 (unless you manage to overclock an STM32 above 4 GHz ? ;-) )

[Dirbaio]

this hurts precision of set_frequency for 32bit timers in use cases that don't care about PWM. IMO the low_level time driver should be "as general as possible" and not do compromises because there's a PWM driver on top of it that can only deal with 16bit ARR.

Maybe the lower level driver could have set_frequency_16 and set_frequency_32? so the PWM driver can always use set_frequency_16 while users can use the 32bit one if they want the extra precision?

[aurelj]

Indeed, limiting precision of 32 bit timers for other cases is not great !

Updated patch only limits precision for PWM, and not for other timer usages.

[Dirbaio]

thanks!