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Add support for stm32f4 additional PLL SAI divider #3406

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I--P
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@I--P I--P commented Oct 9, 2024

This PR adds support to the second divider of the PLL SAI clock found on stm32f4 boards.
I'm as new to embassy as to rust so this code will certainly not match your coding standards, but at least it works.

@I--P I--P changed the title Add support for stm32f4 additional PLL SAI divider Beta Add support for stm32f4 additional PLL SAI divider Oct 9, 2024

info!("KAPOUE {}",pllsai.q);
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something left over from debugging?

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OMG sorry :-)
Should I update my PR for that or will you delete it ?

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No worries, it is your PR you do it.

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you don't have to close the PR to update it, just commit to the branch on your own repo that you are trying to merge. That way the PR updates

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Well, I've not used github for years, I hope I didn't destroy everything, is it ok now ?

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I am not sure if you can do it after you closed the PR, maybe it is possible to re-open? idk

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It's reopened, hopefully it's ok now

@I--P I--P reopened this Dec 2, 2024
let mut pllsai = init_pll(PllInstance::Pllsai, config.pllsai, &pll_input);
#[cfg(any(stm32f446, stm32f427, stm32f437, stm32f4x9, stm32f7))]
RCC.dckcfgr().modify(|w| w.set_pllsaidivq(config.pllsai_divdivq));
pllsai.q = match pllsai.q {
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this could be a map, what is even happening here?

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2 participants