Board support crate for the the GD32 RISC-V Dev Board from SeeedStudio
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Rust 1.36 or a newer toolchain. e.g.
rustup default stable
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rust-std
components (pre-compiledcore
crate) for the RISC-V target. Run:
rustup target add riscv32imac-unknown-none-elf
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RISC-V toolchain (e.g. from SiFive)
Start openocd:
/path/to/openocd -f sipeed-jtag.cfg -f openocd.cfg
Run one of the examples:
cargo run --example blinky
or
cargo run --release --example ferris --features lcd
Copyright 2020 RISC-V team
Permission to use, copy, modify, and/or distribute this software for any purpose with or without fee is hereby granted, provided that the above copyright notice and this permission notice appear in all copies.
THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
Contribution to this crate is organized under the terms of the Rust Code of Conduct, the maintainer of this crate, the RISC-V team, promises to intervene to uphold that code of conduct.