doc: Get information on how to compile and boot Linux on the vcu128
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Oct 23, 2023
* mem_interface: Add typedef and documentation * tcdm_interface: Add doc and include * snitch_cfg: Re-factor tunable parameters All tunable parameters are now in a single package which should make it easier to generate a parameterized derivative of a Snitch cluster. Update pulp_platform_register_interface to 500f0b1 Update code from upstream repository https://github.com/pulp- platform/register_interface.git to revision 500f0b10c7f9910606b7259d290219a35f435d2e * Add `reggen` tool (#5) (bluew) * src/axi_to_reg.sv: Fix parameter exposure (#8) (Flavien Solt) * axi_to_reg: Expose max transactions parameters (#7) (Flavien Solt) Signed-off-by: Florian Zaruba <[email protected]> editorconfig: Set Python indentation to four This is the recommended `pep8` indentation. doc: Add schema and documentation clustergen: Add generated config file A first step towards more advanced parameterization is a script which digests JSON (adhering to a schema) and outputs a parameterized `cfg` package. regtool: Symlink regtool from `register_interface` docs: Symlink ip documentation snitch_cluster: Remove hard-coded TCDM base addr Originally each cluster would alias its local TCDM through a dedicated address region. This has led to strange address maps with hidden memory region (the alias as seen by another cluster). This commit resolves this by adding a `cluster_base_addr_i` port which positions the cluster address map in the global memory region. No more "hidden" memory regions :tada:. doc: Update documentation w/ cluster addr map Update pulp_platform_register_interface to 03a24c6 Update code from upstream repository https://github.com/pulp- platform/register_interface.git to revision 03a24c618888ecaad1c0b2409fdf99c38edbfe41 * Release v0.2.0 (Florian Zaruba) * Add missing LICENSE file (Florian Zaruba) * ci: Add basic workflow (Florian Zaruba) * Fix minor style lint issues (Florian Zaruba) * CHANGELOG: Mention `reggen` tool (Florian Zaruba) * reg_intf_pkg: Remove in favor of typedef.svh (Florian Zaruba) * reggen: Add common cells assertion patch (Florian Zaruba) * Add `__pycache__` to gitignore (Florian Zaruba) * reggen: Change to common_cells assertions (Florian Zaruba) * Bender: Add vendored `prim_reg` sources (Florian Zaruba) Signed-off-by: Florian Zaruba <[email protected]> Replace explicit signals with structs cluster: Replace rigid adapter chain Wolfgang has developed a very nice `axi_to_mem` adapter which finally replaces the adapter chain we had previously in place. For the benefit of humankind. 🧑🚀 Bundle interrupt signals into interrupt struct snitch_cluster: Use `axi_to_mem` for DMA to TCDM Another clean-up of an unnecessary adapter chain. future: Move to separate `ip` tcdm_xbar: Add common_cells based implementation We have a very nice implemenation of a generic `xbar` and `omega network` in the `common_cells` repository. The additional logic needed for the response path is trivial and can be build from `common_cells` components as well. snitch-gen: Generate linker script for the tb modelsim: Simulation bring-up cluster_peripherals: Generated using register tool Update .gitignore tracer: Add tracer script vendor: VCS patches vcs: Cluster simulation bring-up snitch_cluster: Further clean-up lint: Correct stylistic issues wrapper: Generate cluster wrapper from template snitch_cluster: Improve Makefile reqrsp: Update implementation Update cluster with new IPs Make cluster parameterizeable Instantiate new cluster in TB Small bring-up fixes ssr: Add custom instructions to configure SSRs Quality of life improvements common_cells: Add napot address decoder axi: Add `typedef_all` tc_generic: Include `sram` for Verilator vendor: Update with local changes Lint fixes Gen config
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