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@NYU-Processor-Design NYU Processor Design

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    18 repositories

    • nyu-processor-design.github.io

      Public
      39•1•5•3•Updated Nov 25, 2024Nov 25, 2024

    • PurdNyUart

      Public
      SystemVerilog
      •
      Creative Commons Zero v1.0 Universal
      •0•1•0•0•Updated Nov 13, 2024Nov 13, 2024

    • component-template

      Public template
      General SystemVerilog Component Development Template
      CMake
      •
      Creative Commons Zero v1.0 Universal
      •0•0•0•0•Updated Nov 12, 2024Nov 12, 2024

    • onboarding-lab-4

      Public
      Onboarding Lab for Week 4
      SystemVerilog
      •
      Creative Commons Zero v1.0 Universal
      •24•0•0•0•Updated Nov 7, 2024Nov 7, 2024

    • onboarding-lab-3

      Public
      Onboarding Lab for Week 3
      SystemVerilog
      •28•0•0•0•Updated Oct 11, 2024Oct 11, 2024

    • AHBUart

      Public
      SystemVerilog
      •
      Apache License 2.0
      •2•0•0•0•Updated Sep 28, 2024Sep 28, 2024

    • .github

      Public
      Creative Commons Zero v1.0 Universal
      •0•0•0•0•Updated Sep 28, 2024Sep 28, 2024

    • onboarding-lab-2

      Public
      Onboarding Lab for Week 2
      C++
      •28•0•0•0•Updated Sep 20, 2024Sep 20, 2024

    • nyu-core

      Public
      The code and tests for the RISCV-32I compatible core for the NYU Processor Design VIP team.
      C++
      •
      Creative Commons Zero v1.0 Universal
      •11•2•50•1•Updated Sep 3, 2024Sep 3, 2024

    • nyu-amba

      Public
      NYU Processor Design Team's interpretation of ARM's AMBA specifications.
      SystemVerilog
      •
      Creative Commons Zero v1.0 Universal
      •6•1•13•4•Updated Sep 3, 2024Sep 3, 2024

    • nyu-registry

      Public
      NYU Processor Design vcpkg Registry
      CMake
      •1•1•0•0•Updated Sep 3, 2024Sep 3, 2024

    • nyu-util

      Public
      Utilities for the NYU ProcDesign team
      C++
      •
      Creative Commons Zero v1.0 Universal
      •0•0•0•0•Updated Sep 3, 2024Sep 3, 2024

    • onboarding-lab-5

      Public
      Lab 5 Exercise
      CMake
      •
      Creative Commons Zero v1.0 Universal
      •5•0•0•0•Updated Feb 1, 2024Feb 1, 2024

    • nyu-cmake

      Public
      CMake
      •
      Creative Commons Zero v1.0 Universal
      •0•0•0•0•Updated Oct 23, 2023Oct 23, 2023

    • nyu-sim-harness

      Public
      C++
      •
      Creative Commons Zero v1.0 Universal
      •0•0•0•0•Updated May 31, 2023May 31, 2023

    • nyu-simple-core

      Public
      CMake
      •
      Creative Commons Zero v1.0 Universal
      •0•0•0•0•Updated May 31, 2023May 31, 2023

    • nyu-mem

      Public
      The code and tests necessary to perform all memory related functions for the NYU Processor Design VIP team. This includes RAM, ROM, and a memory controller among other components as needed.
      Python
      •
      Creative Commons Zero v1.0 Universal
      •3•0•5•0•Updated Apr 27, 2023Apr 27, 2023

    • explore-verilog

      Public
      CMake
      •
      Creative Commons Zero v1.0 Universal
      •0•0•0•0•Updated Jan 29, 2023Jan 29, 2023