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[prim_fifo_sync,fpv+rtl] Add checks for the full_o output #25464

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When working on #25461, I noticed that we didn't have any assertions about the behaviour of the full_o output port. This PR adds those assertions in the second commit, and makes them true (in a trivial way) in the first.

This is a bit silly, but the storage of an empty fifo is always full
for rather trivial reasons. The existing connection didn't really make
sense (because it was considered full if something was able to read
from it!) so I'm pretty certain this won't break anything.

Signed-off-by: Rupert Swarbrick <[email protected]>
@rswarbrick rswarbrick added Component:FPV FPV issue: formal testbench, property, etc IP:prim labels Nov 29, 2024
@rswarbrick rswarbrick requested a review from a team as a code owner November 29, 2024 16:25
@rswarbrick rswarbrick requested review from hcallahan-lowrisc and removed request for a team November 29, 2024 16:25
Signed-off-by: Rupert Swarbrick <[email protected]>
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