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[AArch64][GlobalISel] ABD operations and combines #118085

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davemgreen opened this issue Nov 29, 2024 · 4 comments · May be fixed by #118122
Open

[AArch64][GlobalISel] ABD operations and combines #118085

davemgreen opened this issue Nov 29, 2024 · 4 comments · May be fixed by #118122
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backend:AArch64 good first issue https://github.com/llvm/llvm-project/contribute llvm:globalisel

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@davemgreen
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SDAG, via these nodes can pattern-recognise and optimise abd nodes. We should add the same operations for global isel.

  /// ABDS/ABDU - Absolute difference - Return the absolute difference between
  /// two numbers interpreted as signed/unsigned.
  /// i.e trunc(abs(sext(Op0) - sext(Op1))) becomes abds(Op0, Op1)
  ///  or trunc(abs(zext(Op0) - zext(Op1))) becomes abdu(Op0, Op1)
  ABDS,
  ABDU,

There are tests in, for example, llvm/test/CodeGen/AArch64/abd-combine.ll.
https://godbolt.org/z/71PGjf486

@llvmbot
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llvmbot commented Nov 29, 2024

@llvm/issue-subscribers-backend-aarch64

Author: David Green (davemgreen)

SDAG, via these nodes can pattern-recognise and optimise abd nodes. We should add the same operations for global isel.
  /// ABDS/ABDU - Absolute difference - Return the absolute difference between
  /// two numbers interpreted as signed/unsigned.
  /// i.e trunc(abs(sext(Op0) - sext(Op1))) becomes abds(Op0, Op1)
  ///  or trunc(abs(zext(Op0) - zext(Op1))) becomes abdu(Op0, Op1)
  ABDS,
  ABDU,

There are tests in, for example, llvm/test/CodeGen/AArch64/abd-combine.ll.
https://godbolt.org/z/71PGjf486

tschuett added a commit to tschuett/llvm-project that referenced this issue Nov 29, 2024
Fixes llvm#118085

The DAG has the same instructions: the signed and unsigned absulute
difference of it's input. For AArch64, they map to uabd and sabd for
Neon and SVE. The SVE instructions will require custom patterns.

/// i.e trunc(abs(sext(Op0) - sext(Op1))) becomes abds(Op0, Op1)
///  or trunc(abs(zext(Op0) - zext(Op1))) becomes abdu(Op0, Op1)

For GlobalISel, we are going to write the combines in MIR patterns.

see:
llvm/test/CodeGen/AArch64/abd-combine.ll
@tschuett tschuett linked a pull request Nov 29, 2024 that will close this issue
@davemgreen davemgreen added the good first issue https://github.com/llvm/llvm-project/contribute label Nov 30, 2024
@llvmbot
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llvmbot commented Nov 30, 2024

Hi!

This issue may be a good introductory issue for people new to working on LLVM. If you would like to work on this issue, your first steps are:

  1. Check that no other contributor has already been assigned to this issue. If you believe that no one is actually working on it despite an assignment, ping the person. After one week without a response, the assignee may be changed.
  2. In the comments of this issue, request for it to be assigned to you, or just create a pull request after following the steps below. Mention this issue in the description of the pull request.
  3. Fix the issue locally.
  4. Run the test suite locally. Remember that the subdirectories under test/ create fine-grained testing targets, so you can e.g. use make check-clang-ast to only run Clang's AST tests.
  5. Create a Git commit.
  6. Run git clang-format HEAD~1 to format your changes.
  7. Open a pull request to the upstream repository on GitHub. Detailed instructions can be found in GitHub's documentation. Mention this issue in the description of the pull request.

If you have any further questions about this issue, don't hesitate to ask via a comment in the thread below.

@llvmbot
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llvmbot commented Nov 30, 2024

@llvm/issue-subscribers-good-first-issue

Author: David Green (davemgreen)

SDAG, via these nodes can pattern-recognise and optimise abd nodes. We should add the same operations for global isel.
  /// ABDS/ABDU - Absolute difference - Return the absolute difference between
  /// two numbers interpreted as signed/unsigned.
  /// i.e trunc(abs(sext(Op0) - sext(Op1))) becomes abds(Op0, Op1)
  ///  or trunc(abs(zext(Op0) - zext(Op1))) becomes abdu(Op0, Op1)
  ABDS,
  ABDU,

There are tests in, for example, llvm/test/CodeGen/AArch64/abd-combine.ll.
https://godbolt.org/z/71PGjf486

@davemgreen
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I've added good first issue to this ticket, not because it is a small task but that it should be an interesting case that is relatively well understood that someone can attempt.

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