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[AArch64][GlobalISel] ABD operations and combines #118085
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@llvm/issue-subscribers-backend-aarch64 Author: David Green (davemgreen)
SDAG, via these nodes can pattern-recognise and optimise abd nodes. We should add the same operations for global isel.
There are tests in, for example, llvm/test/CodeGen/AArch64/abd-combine.ll. |
Fixes llvm#118085 The DAG has the same instructions: the signed and unsigned absulute difference of it's input. For AArch64, they map to uabd and sabd for Neon and SVE. The SVE instructions will require custom patterns. /// i.e trunc(abs(sext(Op0) - sext(Op1))) becomes abds(Op0, Op1) /// or trunc(abs(zext(Op0) - zext(Op1))) becomes abdu(Op0, Op1) For GlobalISel, we are going to write the combines in MIR patterns. see: llvm/test/CodeGen/AArch64/abd-combine.ll
Hi! This issue may be a good introductory issue for people new to working on LLVM. If you would like to work on this issue, your first steps are:
If you have any further questions about this issue, don't hesitate to ask via a comment in the thread below. |
@llvm/issue-subscribers-good-first-issue Author: David Green (davemgreen)
SDAG, via these nodes can pattern-recognise and optimise abd nodes. We should add the same operations for global isel.
There are tests in, for example, llvm/test/CodeGen/AArch64/abd-combine.ll. |
I've added good first issue to this ticket, not because it is a small task but that it should be an interesting case that is relatively well understood that someone can attempt. |
SDAG, via these nodes can pattern-recognise and optimise abd nodes. We should add the same operations for global isel.
There are tests in, for example, llvm/test/CodeGen/AArch64/abd-combine.ll.
https://godbolt.org/z/71PGjf486
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