-
Notifications
You must be signed in to change notification settings - Fork 43
/
sparc.SPEC
116 lines (94 loc) · 2.49 KB
/
sparc.SPEC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
****************
Platform: Sparc
Code:0x80 0xa0 0x40 0x02 0x85 0xc2 0x60 0x08 0x85 0xe8 0x20 0x01 0x81 0xe8 0x00 0x00 0x90 0x10 0x20 0x01 0xd5 0xf6 0x10 0x16 0x21 0x00 0x00 0x0a 0x86 0x00 0x40 0x02 0x01 0x00 0x00 0x00 0x12 0xbf 0xff 0xff 0x10 0xbf 0xff 0xff 0xa0 0x02 0x00 0x09 0x0d 0xbf 0xff 0xff 0xd4 0x20 0x60 0x00 0xd4 0x4e 0x00 0x16 0x2a 0xc2 0x80 0x03
Disasm:
0x1000: cmp %g1, %g2
op_count: 2
operands[0].type: REG = g1
operands[1].type: REG = g2
0x1004: jmpl %o1+8, %g2
op_count: 2
operands[0].type: MEM
operands[0].mem.base: REG = o1
operands[0].mem.disp: 0x8
operands[1].type: REG = g2
0x1008: restore %g0, 1, %g2
op_count: 3
operands[0].type: REG = g0
operands[1].type: IMM = 0x1
operands[2].type: REG = g2
0x100c: restore
0x1010: mov 1, %o0
op_count: 2
operands[0].type: IMM = 0x1
operands[1].type: REG = o0
0x1014: casx [%i0], %l6, %o2
op_count: 3
operands[0].type: MEM
operands[0].mem.base: REG = i0
operands[1].type: REG = l6
operands[2].type: REG = o2
0x1018: sethi 0xa, %l0
op_count: 2
operands[0].type: IMM = 0xa
operands[1].type: REG = l0
0x101c: add %g1, %g2, %g3
op_count: 3
operands[0].type: REG = g1
operands[1].type: REG = g2
operands[2].type: REG = g3
0x1020: nop
0x1024: bne 0x1020
op_count: 1
operands[0].type: IMM = 0x1020
Code condition: 265
0x1028: ba 0x1024
op_count: 1
operands[0].type: IMM = 0x1024
0x102c: add %o0, %o1, %l0
op_count: 3
operands[0].type: REG = o0
operands[1].type: REG = o1
operands[2].type: REG = l0
0x1030: fbg 0x102c
op_count: 1
operands[0].type: IMM = 0x102c
Code condition: 278
0x1034: st %o2, [%g1]
op_count: 2
operands[0].type: REG = o2
operands[1].type: MEM
operands[1].mem.base: REG = g1
0x1038: ldsb [%i0+%l6], %o2
op_count: 2
operands[0].type: MEM
operands[0].mem.base: REG = i0
operands[0].mem.index: REG = l6
operands[1].type: REG = o2
0x103c: brnz,a,pn %o2, 0x1048
op_count: 2
operands[0].type: REG = o2
operands[1].type: IMM = 0x1048
Hint code: 5
0x1040:
****************
Platform: SparcV9
Code:0x81 0xa8 0x0a 0x24 0x89 0xa0 0x10 0x20 0x89 0xa0 0x1a 0x60 0x89 0xa0 0x00 0xe0
Disasm:
0x1000: fcmps %f0, %f4
op_count: 2
operands[0].type: REG = f0
operands[1].type: REG = f4
0x1004: fstox %f0, %f4
op_count: 2
operands[0].type: REG = f0
operands[1].type: REG = f4
0x1008: fqtoi %f0, %f4
op_count: 2
operands[0].type: REG = f0
operands[1].type: REG = f4
0x100c: fnegq %f0, %f4
op_count: 2
operands[0].type: REG = f0
operands[1].type: REG = f4
0x1010: