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I found the thread relates to this issue in xilinx forum.
https://support.xilinx.com/s/feed/0D54U00005WaC3zSAF?language=ja
The text was updated successfully, but these errors were encountered:
Pmods and rpi pin header are in PL domain. User need to implement a custom PL design! Have fun:tada:
This article is nice. https://www.hackster.io/whitney-knitter/rpi-pmod-connector-gpio-with-custom-pl-design-in-kria-kr260-53c40e
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I found the thread relates to this issue in xilinx forum.
https://support.xilinx.com/s/feed/0D54U00005WaC3zSAF?language=ja
The text was updated successfully, but these errors were encountered: